HSK Pulse Width Counter implementation. More...

#include <Infineon/XC878.h>
#include "hsk_pwc.h"
#include <string.h>
#include "../hsk_isr/hsk_isr.h"

Include dependency graph for hsk_pwc.c:

Macros
#define	PWC_CHANNELS 4
	The number of available PWC channels. More...

#define	CHAN_BUF_SIZE 8
	The size of a PWC ring buffer. More...

#define	BIT_T2CCFG 4
	CR_MISC Timer 2 Capture/Compare Unit Clock Configuration bit. More...

#define	BIT_CCTST 0
	T2CCU_CCTCON Capture/Compare Timer Start/Stop Control bit. More...

#define	BIT_TIMSYN 1
	T2CCU_CCTCON Enable synchronized Timer Starts. More...

#define	BIT_CCTOVEN 2
	T2CCU_CCTCON Capture/Compare Timer Overflow Interrupt Enable bit. More...

#define	BIT_CCTOVF 3
	T2CCU_CCTCON Capture/Compare Timer Overflow Flag bit. More...

#define	BIT_CCTPRE 4
	T2CCU_CCTCON T2CCU Capture/Compare Timer Control Register bits. More...

#define	BIT_CCTBx 0
	T2CCU_CCTBSEL Channel x Time Base Select bit. More...

#define	BIT_IMODE 4
	SYSCON0 Interrupt Structure 2 Mode Select bit. More...

#define	BIT_CCM0 0
	T2CCU_CCEN Capture/Compare Enable bits start. More...

#define	CNT_CCMx 2
	CCMx bit count. More...

#define	EDGE_DEFAULT_MODE PWC_EDGE_BOTH
	Default to using both edges for pulse detection. More...

#define	CNT_EXINTx 2
	EXICONn EXINTx mode bit count. More...

#define	PWC_CC0_EXINT_REG EXICON0
	External Interrupt Control Register for setting the PWC_CC0 edge detection mode. More...

#define	PWC_CC0_EXINT_BIT 6
	The edge detection mode bit position for PWC_CC0. More...

#define	PWC_CC1_EXINT_REG EXICON1
	External Interrupt Control Register for setting the PWC_CC1 edge detection mode. More...

#define	PWC_CC1_EXINT_BIT 0
	The edge detection mode bit position for PWC_CC1. More...

#define	PWC_CC2_EXINT_REG EXICON1
	External Interrupt Control Register for setting the PWC_CC2 edge detection mode. More...

#define	PWC_CC2_EXINT_BIT 2
	The edge detection mode bit position for PWC_CC2. More...

#define	PWC_CC3_EXINT_REG EXICON1
	External Interrupt Control Register for setting the PWC_CC3 edge detection mode. More...

#define	PWC_CC3_EXINT_BIT 4
	The edge detection mode bit position for PWC_CC3. More...

#define	BIT_T2CCU_DIS 3
	PMCON1 T2CCU Disable Request bit. More...

Functions
void	hsk_pwc_isr_ccn (const hsk_pwc_channel channel, uword capture) using 1
	This is the common implementation of the Capture ISRs. More...

void	hsk_pwc_isr_cc0_p30 (void)
	The ISR for Capture events on channel PWC_CC0_P30. More...

void	hsk_pwc_isr_cc0_p40 (void)
	The ISR for Capture events on channel PWC_CC0_P40. More...

void	hsk_pwc_isr_cc0_p55 (void)
	The ISR for Capture events on channel PWC_CC0_P55. More...

void	hsk_pwc_isr_cc1_p32 (void)
	The ISR for Capture events on channel PWC_CC1_P32. More...

void	hsk_pwc_isr_cc1_p41 (void)
	The ISR for Capture events on channel PWC_CC1_P41. More...

void	hsk_pwc_isr_cc1_p56 (void)
	The ISR for Capture events on channel PWC_CC1_P56. More...

void	hsk_pwc_isr_cc2_p33 (void)
	The ISR for Capture events on channel PWC_CC2_P33. More...

void	hsk_pwc_isr_cc2_p44 (void)
	The ISR for Capture events on channel PWC_CC2_P44. More...

void	hsk_pwc_isr_cc2_p52 (void)
	The ISR for Capture events on channel PWC_CC2_P52. More...

void	hsk_pwc_isr_cc3_p34 (void)
	The ISR for Capture events on channel PWC_CC3_P34. More...

void	hsk_pwc_isr_cc3_p45 (void)
	The ISR for Capture events on channel PWC_CC3_P45. More...

void	hsk_pwc_isr_cc3_p57 (void)
	The ISR for Capture events on channel PWC_CC3_P57. More...

void	hsk_pwc_isr_cctOverflow (void)
	The ISR for Capture/Compare overflow events. More...

void	hsk_pwc_ccn (const hsk_pwc_channel channel, uword capture)
	This is the common implementation for soft capture events. More...

void	hsk_pwc_init (ulong window)
	This function initializes the T2CCU Capture/Compare Unit for capture mode. More...

void	hsk_pwc_channel_open (const hsk_pwc_channel channel, ubyte averageOver)
	Configures a PWC channel without an input port. More...

void	hsk_pwc_port_open (const hsk_pwc_port port, ubyte averageOver)
	Opens an input port and the connected channel. More...

void	hsk_pwc_channel_close (const hsk_pwc_channel channel)
	Close a PWC channel. More...

void	hsk_pwc_channel_edgeMode (const hsk_pwc_channel channel, const ubyte edgeMode)
	Select the edge that is used to detect a pulse. More...

void	hsk_pwc_channel_captureMode (const hsk_pwc_channel channel, const ubyte captureMode)
	Allows switching between external and soft trigger. More...

void	hsk_pwc_channel_trigger (const hsk_pwc_channel channel)
	Triggers a channel in soft trigger mode. More...

void	hsk_pwc_enable (void)
	Enables T2CCU module if disabled. More...

void	hsk_pwc_disable (void)
	Turns off the T2CCU clock to preserve power. More...

ulong	hsk_pwc_channel_getValue (const hsk_pwc_channel channel, const ubyte unit)
	Returns a measure of the values in a channel buffer. More...

Variables
static ubyte	prescaler
	The prescaling factor. More...

static volatile ubyte	overflows
	A CCT overflow counter. More...

struct {
ulong sum
	The sum of the values stored in the ring buffer. More...

uword buffer [8]
	A ring buffer of PWC values. More...

uword lastCapture
	The last captured value. More...

ubyte averageOver
	The number of pulses to average over. More...

ubyte pos
	The current ring position. More...

ubyte overflow
	The overflow count during the last capture. More...

ubyte invalid
	This is an invalidation counter. More...

ubyte state
	The state of the input pin during the last update. More...

}	channels [4]
	Processing data for PWC channels. More...

struct {
ubyte portBit
	The input port configuration bit position. More...

ubyte portSel
	The input port configuration bits to select. More...

ubyte inBit
	The external interrupt configuration bit position. More...

ubyte inSel
	The external interrupt configuration to select. More...

ubyte inCount
	The external interrupt configuration bit count. More...

}	hsk_pwc_ports []
	External input configuration structure. More...

Detailed Description

HSK Pulse Width Counter implementation.

The Pulse Width Conter (PWC) module uses the T2CCU Capture/Compare Timer (CCT) to measure pulse width.

Author: kami

Macro Definition Documentation

§ BIT_CCM0

#define BIT_CCM0 0

T2CCU_CCEN Capture/Compare Enable bits start.

§ BIT_CCTBx

#define BIT_CCTBx 0

T2CCU_CCTBSEL Channel x Time Base Select bit.

§ BIT_CCTOVEN

#define BIT_CCTOVEN 2

T2CCU_CCTCON Capture/Compare Timer Overflow Interrupt Enable bit.

§ BIT_CCTOVF

#define BIT_CCTOVF 3

T2CCU_CCTCON Capture/Compare Timer Overflow Flag bit.

§ BIT_CCTPRE

#define BIT_CCTPRE 4

T2CCU_CCTCON T2CCU Capture/Compare Timer Control Register bits.

§ BIT_CCTST

#define BIT_CCTST 0

T2CCU_CCTCON Capture/Compare Timer Start/Stop Control bit.

§ BIT_IMODE

#define BIT_IMODE 4

SYSCON0 Interrupt Structure 2 Mode Select bit.

§ BIT_T2CCFG

#define BIT_T2CCFG 4

CR_MISC Timer 2 Capture/Compare Unit Clock Configuration bit.

§ BIT_T2CCU_DIS

#define BIT_T2CCU_DIS 3

PMCON1 T2CCU Disable Request bit.

§ BIT_TIMSYN

#define BIT_TIMSYN 1

T2CCU_CCTCON Enable synchronized Timer Starts.

§ CHAN_BUF_SIZE

#define CHAN_BUF_SIZE 8

The size of a PWC ring buffer.

This must not be greater than 32 or the calculation of values returned by hsk_pwc_channel_getValue() might overflow.

The value 8 should be a sensible compromise between an interest to get averages from a sufficient number of values and memory use.

§ CNT_CCMx

#define CNT_CCMx 2

CCMx bit count.

§ CNT_EXINTx

#define CNT_EXINTx 2

EXICONn EXINTx mode bit count.

§ EDGE_DEFAULT_MODE

#define EDGE_DEFAULT_MODE PWC_EDGE_BOTH

Default to using both edges for pulse detection.

§ PWC_CC0_EXINT_BIT

#define PWC_CC0_EXINT_BIT 6

The edge detection mode bit position for PWC_CC0.

§ PWC_CC0_EXINT_REG

#define PWC_CC0_EXINT_REG EXICON0

External Interrupt Control Register for setting the PWC_CC0 edge detection mode.

§ PWC_CC1_EXINT_BIT

#define PWC_CC1_EXINT_BIT 0

The edge detection mode bit position for PWC_CC1.

§ PWC_CC1_EXINT_REG

#define PWC_CC1_EXINT_REG EXICON1

External Interrupt Control Register for setting the PWC_CC1 edge detection mode.

§ PWC_CC2_EXINT_BIT

#define PWC_CC2_EXINT_BIT 2

The edge detection mode bit position for PWC_CC2.

§ PWC_CC2_EXINT_REG

#define PWC_CC2_EXINT_REG EXICON1

External Interrupt Control Register for setting the PWC_CC2 edge detection mode.

§ PWC_CC3_EXINT_BIT

#define PWC_CC3_EXINT_BIT 4

The edge detection mode bit position for PWC_CC3.

§ PWC_CC3_EXINT_REG

#define PWC_CC3_EXINT_REG EXICON1

External Interrupt Control Register for setting the PWC_CC3 edge detection mode.

§ PWC_CHANNELS

#define PWC_CHANNELS 4

The number of available PWC channels.

Function Documentation

§ hsk_pwc_ccn()

void hsk_pwc_ccn	(	const hsk_pwc_channel	channel,
		uword	capture
	)

private

This is the common implementation for soft capture events.

Parameters

channel	The channel that was captured.
capture	The value that was captured.

§ hsk_pwc_channel_captureMode()

void hsk_pwc_channel_captureMode	(	const hsk_pwc_channel	channel,
		const ubyte	captureMode
	)

Allows switching between external and soft trigger.

This does not reconfigure the input ports. Available modes are specified in the PWC_MODE_* defines. PWC_MODE_EXT is the default.

Parameters

channel	The channel to configure.
captureMode	The mode to set the channel to.

§ hsk_pwc_channel_close()

void hsk_pwc_channel_close ( const hsk_pwc_channel channel )

Close a PWC channel.

Parameters

channel The channel to close.

§ hsk_pwc_channel_edgeMode()

void hsk_pwc_channel_edgeMode	(	const hsk_pwc_channel	channel,
		const ubyte	edgeMode
	)

Select the edge that is used to detect a pulse.

Available edges are specified in the PWC_EDGE_* defines.

Parameters

channel	The channel to configure the edge for.
edgeMode	The selected edge detection mode.

§ hsk_pwc_channel_getValue()

ulong hsk_pwc_channel_getValue	(	const hsk_pwc_channel	channel,
		const ubyte	unit
	)

Returns a measure of the values in a channel buffer.

It also takes care of invalidating channels that haven't been captured for too long.

The value is returned in a requested unit, the units defined as PWC_UNIT_* are available.

Parameters

channel	The channel to return the buffer sum of
unit	' The unit to return the channel value in

Return values

>0	The channel value in the requested unit
0	Invalid channel, measurement timed out

§ hsk_pwc_channel_open()

void hsk_pwc_channel_open	(	const hsk_pwc_channel	channel,
		ubyte	averageOver
	)

Configures a PWC channel without an input port.

The channel is set up for software triggering (PWC_MODE_SOFT), and triggering on both edges (PWC_EDGE_BOTH).

Parameters

channel	The PWC channel to open
averageOver	The number of pulse values to average over when returning a value or speed. The value must be between 1 and 8.

Set the PWC capture mode.

Set the interrupt triggering edge.

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§ hsk_pwc_channel_trigger()

void hsk_pwc_channel_trigger ( const hsk_pwc_channel channel )

Triggers a channel in soft trigger mode.

Parameters

channel The channel to trigger.

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§ hsk_pwc_disable()

void hsk_pwc_disable ( void )

Turns off the T2CCU clock to preserve power.

§ hsk_pwc_enable()

void hsk_pwc_enable ( void )

Enables T2CCU module if disabled.

§ hsk_pwc_init()

void hsk_pwc_init ( ulong window )

This function initializes the T2CCU Capture/Compare Unit for capture mode.

The capturing is based on the CCT timer. Timer T2 is not used and thus can be useed without interference.

The window time is the time frame within which pulses should be detected. A smaller time frame results in higher precission, but detection of longer pulses will fail.

Window times vary between ~1ms ( $(2^{16} - 1) / (48 * 10^6)$ ) and ~5592ms ( $(2^{16} - 1) * 2^{12} / (48 * 10^6)$ ). The shortest window time delivers ~20ns and the longest time ~85µs precision.

The real window time is on a logarithmic scale (base 2), the init function will select the lowest scale that guarantees the required window time. I.e. the highest precision possible with the desired window time, which is at least $2^{15}$ for all windows below or equal 5592ms.

Parameters

window The time in ms to detect a pulse.

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§ hsk_pwc_isr_cc0_p30()

void hsk_pwc_isr_cc0_p30 ( void )

private

The ISR for Capture events on channel PWC_CC0_P30.

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§ hsk_pwc_isr_cc0_p40()

void hsk_pwc_isr_cc0_p40 ( void )

private

The ISR for Capture events on channel PWC_CC0_P40.

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§ hsk_pwc_isr_cc0_p55()

void hsk_pwc_isr_cc0_p55 ( void )

private

The ISR for Capture events on channel PWC_CC0_P55.

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§ hsk_pwc_isr_cc1_p32()

void hsk_pwc_isr_cc1_p32 ( void )

private

The ISR for Capture events on channel PWC_CC1_P32.

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§ hsk_pwc_isr_cc1_p41()

void hsk_pwc_isr_cc1_p41 ( void )

private

The ISR for Capture events on channel PWC_CC1_P41.

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§ hsk_pwc_isr_cc1_p56()

void hsk_pwc_isr_cc1_p56 ( void )

private

The ISR for Capture events on channel PWC_CC1_P56.

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§ hsk_pwc_isr_cc2_p33()

void hsk_pwc_isr_cc2_p33 ( void )

private

The ISR for Capture events on channel PWC_CC2_P33.

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§ hsk_pwc_isr_cc2_p44()

void hsk_pwc_isr_cc2_p44 ( void )

private

The ISR for Capture events on channel PWC_CC2_P44.

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§ hsk_pwc_isr_cc2_p52()

void hsk_pwc_isr_cc2_p52 ( void )

private

The ISR for Capture events on channel PWC_CC2_P52.

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§ hsk_pwc_isr_cc3_p34()

void hsk_pwc_isr_cc3_p34 ( void )

private

The ISR for Capture events on channel PWC_CC3_P34.

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§ hsk_pwc_isr_cc3_p45()

void hsk_pwc_isr_cc3_p45 ( void )

private

The ISR for Capture events on channel PWC_CC3_P45.

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§ hsk_pwc_isr_cc3_p57()

void hsk_pwc_isr_cc3_p57 ( void )

private

The ISR for Capture events on channel PWC_CC3_P57.

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§ hsk_pwc_isr_ccn()

void hsk_pwc_isr_ccn	(	const hsk_pwc_channel	channel,
		uword	capture
	)

private

This is the common implementation of the Capture ISRs.

Parameters

channel	The channel that was captured.
capture	The value that was captured.

§ hsk_pwc_isr_cctOverflow()

void hsk_pwc_isr_cctOverflow ( void )

private

The ISR for Capture/Compare overflow events.

It simply increases overflows, which is used by hsk_pwc_channel_getSum() to check whether the capture time window was left.

§ hsk_pwc_port_open()

void hsk_pwc_port_open	(	const hsk_pwc_port	port,
		ubyte	averageOver
	)

Opens an input port and the connected channel.

The available configurations are available from the PWC_CCn_* defines.

Parameters

port	The input port to open
averageOver	The number of pulse values to average over when returning a value or speed. The value must be between 1 and CHAN_BUF_SIZE

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Variable Documentation

§ averageOver

ubyte averageOver

The number of pulses to average over.

§ buffer

uword buffer[8]

A ring buffer of PWC values.

§ channels

channels

static

Processing data for PWC channels.

§ hsk_pwc_ports

hsk_pwc_ports

Initial value:

= {
         {0, 3, 0, 2, 2},
         {0, 4, 0, 1, 2},
         {5, 2, 0, 3, 2},
         {2, 5, 2, 2, 2},
         {1, 1, 2, 1, 2},
         {6, 2, 2, 3, 2},
         {3, 1, 4, 2, 2},
         {4, 3, 4, 1, 2},
         {2, 2, 4, 3, 2},
         {4, 4, 5, 3, 3},
         {5, 3, 5, 2, 3},
         {7, 3, 5, 4, 3}
}

External input configuration structure.

§ inBit

ubyte inBit

The external interrupt configuration bit position.

§ inCount

ubyte inCount

The external interrupt configuration bit count.

§ inSel

ubyte inSel

The external interrupt configuration to select.

§ invalid

ubyte invalid

This is an invalidation counter.

Each time 0 is written into the buffer this is increased. Each time a valid value makes it in it's decreased, so that results are only output by getSum when all values are valid.

§ lastCapture

uword lastCapture

The last captured value.

§ overflow

ubyte overflow

The overflow count during the last capture.

This is used by hsk_pwc_channel_getSum() to detect whether the capturing time window was left.

§ overflows

volatile ubyte overflows

static

A CCT overflow counter.

§ portBit

ubyte portBit

The input port configuration bit position.

§ portSel

ubyte portSel

The input port configuration bits to select.

§ pos

ubyte pos

The current ring position.

§ prescaler

ubyte prescaler

static

The prescaling factor.

§ state

ubyte state

The state of the input pin during the last update.

I.e. in case of 0 a high pulse was completed, in case of 1 a low pulse.

§ sum

ulong sum

The sum of the values stored in the ring buffer.

Macros

Functions

Variables

Detailed Description

Macro Definition Documentation

§ BIT_CCM0

§ BIT_CCTBx

§ BIT_CCTOVEN

§ BIT_CCTOVF

§ BIT_CCTPRE

§ BIT_CCTST

§ BIT_IMODE

§ BIT_T2CCFG

§ BIT_T2CCU_DIS

§ BIT_TIMSYN

§ CHAN_BUF_SIZE

§ CNT_CCMx

§ CNT_EXINTx

§ EDGE_DEFAULT_MODE

§ PWC_CC0_EXINT_BIT

§ PWC_CC0_EXINT_REG

§ PWC_CC1_EXINT_BIT

§ PWC_CC1_EXINT_REG

§ PWC_CC2_EXINT_BIT

§ PWC_CC2_EXINT_REG

§ PWC_CC3_EXINT_BIT

§ PWC_CC3_EXINT_REG

§ PWC_CHANNELS

Function Documentation

§ hsk_pwc_ccn()

§ hsk_pwc_channel_captureMode()

§ hsk_pwc_channel_close()

§ hsk_pwc_channel_edgeMode()

§ hsk_pwc_channel_getValue()

§ hsk_pwc_channel_open()

§ hsk_pwc_channel_trigger()

§ hsk_pwc_disable()

§ hsk_pwc_enable()

§ hsk_pwc_init()

§ hsk_pwc_isr_cc0_p30()

§ hsk_pwc_isr_cc0_p40()

§ hsk_pwc_isr_cc0_p55()

§ hsk_pwc_isr_cc1_p32()

§ hsk_pwc_isr_cc1_p41()

§ hsk_pwc_isr_cc1_p56()

§ hsk_pwc_isr_cc2_p33()

§ hsk_pwc_isr_cc2_p44()

§ hsk_pwc_isr_cc2_p52()

§ hsk_pwc_isr_cc3_p34()

§ hsk_pwc_isr_cc3_p45()

§ hsk_pwc_isr_cc3_p57()

§ hsk_pwc_isr_ccn()

§ hsk_pwc_isr_cctOverflow()

§ hsk_pwc_port_open()

Variable Documentation

§ averageOver

§ buffer

§ channels

§ hsk_pwc_ports

§ inBit

§ inCount

§ inSel

§ invalid

§ lastCapture

§ overflow

§ overflows

§ portBit

§ portSel

§ pos

§ prescaler

§ state

§ sum